PE Computer Engineering Exam: 10 Practice Problems with Detailed Solutions

Answer: B

The Thévenin equivalent reduces any linear circuit to a single voltage source in series with a single resistance as seen from two terminals.

Step 1 — Find V_Th (open-circuit voltage across A-B):

With terminals A-B open, no current flows through R₂ from any external load, but current does flow from the source through R₁ and R₂ (since R₂ connects junction to ground). By voltage divider:

V_Th = V_S × R₂ / (R₁ + R₂) = 24 × 12 / (6 + 12) = 24 × 12 / 18 = 16 V

Step 2 — Find R_Th (equivalent resistance with source zeroed):

Replace the 24 V source with a short circuit. Looking into terminals A-B, R₁ and R₂ are in parallel:

R_Th = R₁ ∥ R₂ = (R₁ × R₂) / (R₁ + R₂) = (6 × 12) / (6 + 12) = 72 / 18 = 4 Ω

Verification: The short-circuit current would be I_SC = V_Th / R_Th = 16 / 4 = 4 A. We can verify independently: shorting A-B places R₂ in parallel with the short (yielding 0 Ω), so all source current flows through R₁: I_SC = 24 / 6 = 4 A. Confirmed.

Key concept: Thévenin’s theorem is foundational for the PE Computer Engineering exam. To find V_Th, compute the open-circuit voltage. To find R_Th, deactivate all independent sources (short voltage sources, open current sources) and find the equivalent resistance. Always verify by checking that V_Th / R_Th equals the short-circuit current.

Answer: C

For a common-source MOSFET amplifier with a bypassed source resistor, the small-signal voltage gain is determined by the transconductance and the drain resistance.

Step 1 — Write the gain expression:

With the source resistor bypassed (AC-grounded) and r_o ≫ R_D:

A_v = −g_m × R_D

Step 2 — Substitute values:

A_v = −(5 × 10⁻³) × (4 × 10³) = −20

Step 3 — Take the magnitude:

|A_v| = 20

Verification: The gain formula A_v = −g_m R_D comes from the small-signal model where v_out = −g_m v_gs × R_D and v_gs = v_in (since R_S is bypassed). Units check: mS × kΩ = (10⁻³)(10³) = dimensionless. Correct.

Key concept: The negative sign indicates a 180° phase inversion, which is characteristic of the common-source configuration. If the source resistor were not bypassed, the gain would reduce to A_v = −g_m R_D / (1 + g_m R_S), providing negative feedback that stabilizes the bias point at the cost of lower gain. On the PE Computer Engineering exam, know all three MOSFET amplifier configurations: common-source (voltage gain), common-drain/source-follower (voltage buffer), and common-gate (current buffer).

Answer: C

A causal discrete-time LTI system is BIBO stable if and only if all poles of H(z) lie strictly inside the unit circle (|z| < 1).

Step 1 — Find the poles by solving the denominator:

z² − 1.2z + 0.32 = 0

Using the quadratic formula: z = (1.2 ± √(1.44 − 1.28)) / 2

Step 2 — Evaluate the discriminant:

Δ = 1.44 − 1.28 = 0.16

√0.16 = 0.4

Step 3 — Compute the pole locations:

z₁ = (1.2 + 0.4) / 2 = 1.6 / 2 = 0.8

z₂ = (1.2 − 0.4) / 2 = 0.8 / 2 = 0.4

Step 4 — Check stability:

|z₁| = 0.8 < 1 and |z₂| = 0.4 < 1. Both poles lie strictly inside the unit circle, so the system is stable.

Verification: We can confirm by expanding: (z − 0.8)(z − 0.4) = z² − 1.2z + 0.32. This matches the denominator exactly.

Key concept: For discrete-time systems, stability requires all poles inside the unit circle (|z| < 1). This is analogous to continuous-time systems where stability requires all poles in the left-half s-plane (Re(s) < 0). The zero at z = 0.5 affects the frequency response shape but not stability. On the PE Computer Engineering exam, always factor the denominator to find pole locations before drawing conclusions about stability.

Answer: C

The closed-loop characteristic equation for a unity-feedback system is 1 + G(s) = 0, which gives us the denominator polynomial to test with Routh-Hurwitz.

Step 1 — Form the characteristic equation:

s(s + 2)(s + 5) + K = 0

Expanding: s³ + 7s² + 10s + K = 0

Step 2 — Construct the Routh array:

Step 3 — Apply stability conditions (all first-column entries must be positive):

• s² row: 7 > 0 (always satisfied)
• s¹ row: (70 − K) / 7 > 0 → K < 70
• s⁰ row: K > 0

Result: The system is stable for 0 < K < 70. The maximum gain for stability is K = 70.

Verification: At K = 70, the s¹ row becomes zero, indicating imaginary-axis poles. The auxiliary equation from the s² row is 7s² + 70 = 0, giving s = ±j√10 ≈ ±j3.16 rad/s. These are purely imaginary poles confirming marginal stability at exactly K = 70.

Key concept: The Routh-Hurwitz criterion is the standard analytical method for determining closed-loop stability without computing the actual root locations. For a third-order system s³ + as² + bs + c = 0, the critical stability condition simplifies to ab > c. Here: 7 × 10 = 70 > K, confirming K < 70. On the PE Computer Engineering exam, this technique appears in both control systems and signal processing contexts.

Answer: C

The Shannon-Hartley theorem gives the maximum theoretical channel capacity for an additive white Gaussian noise (AWGN) channel:

C = B × log₂(1 + SNR_linear)

Step 1 — Convert SNR from dB to linear:

SNR_dB = 10 × log₁₀(SNR_linear)

24 = 10 × log₁₀(SNR_linear)

log₁₀(SNR_linear) = 2.4

SNR_linear = 10^2.4 ≈ 251.19

Step 2 — Apply the Shannon-Hartley formula:

C = 4 × 10⁶ × log₂(1 + 251.19)

C = 4 × 10⁶ × log₂(252.19)

Step 3 — Evaluate the logarithm:

Since 2⁸ = 256, we know log₂(256) = 8. Since 252.19 is very close to 256:

log₂(252.19) = ln(252.19) / ln(2) = 5.530 / 0.6931 ≈ 7.98

Step 4 — Compute the capacity:

C = 4 × 10⁶ × 7.98 ≈ 31.9 × 10⁶ bps ≈ 32 Mbps

Verification: If SNR were exactly 255 (linear), then 1 + 255 = 256 = 2⁸, and C = 4 × 8 = 32 Mbps exactly. Our SNR of 10^2.4 = 251.19 gives a result very close to this, confirming 32 Mbps is the best answer.

Key concept: The Shannon limit represents an absolute upper bound—no real coding scheme can exceed it. In practice, modern systems using turbo codes or LDPC codes can approach within 1 dB of the Shannon limit. Note that doubling the bandwidth doubles the capacity, but doubling the SNR adds only one more bit per Hz of bandwidth (since log₂ is logarithmic). On the PE Computer Engineering exam, always convert dB to linear before applying the formula.

Answer: B

A Mealy machine produces outputs that depend on both the current state and the current input, while a Moore machine’s outputs depend only on the current state. This fundamental difference means Mealy machines typically need fewer states.

Step 1 — Design the Mealy machine for detecting “101”:

• S0 (initial / no match): Waiting for first “1”
• S1 (seen “1”): Last bit was 1
• S2 (seen “10”): Last two bits were “10”

Transitions: In S2, if input X = 1, output Z = 1 (detected “101”) and return to S1 (since this “1” could start a new overlapping sequence). That gives 3 states.

Step 2 — Design the Moore machine for detecting “101”:

Since the Moore output depends only on the state, we need a dedicated output state:

• S0 (initial): Z = 0
• S1 (seen “1”): Z = 0
• S2 (seen “10”): Z = 0
• S3 (seen “101”): Z = 1

From S3 with overlap detection, transitions continue based on the next input. This requires 4 states.

Key concept: A Mealy machine can often detect a sequence with one fewer state than a Moore machine because the output can react to the triggering input in the same clock cycle, without needing a separate “output asserted” state. However, Mealy outputs can glitch between clock edges if the input changes asynchronously, while Moore outputs are synchronized to the clock. On the PE Computer Engineering exam, know how to draw state diagrams for both types and convert between them.

Answer: B

Subnetting requires balancing the number of host bits (for addressable devices) against subnet bits (for the number of subnets).

Step 1 — Determine the minimum host bits needed:

Usable hosts per subnet = 2ⁿ − 2 (subtracting the network and broadcast addresses).

We need at least 30 hosts: 2ⁿ − 2 ≥ 30

2⁴ − 2 = 14 (not enough). 2⁵ − 2 = 30 (exactly 30). So we need 5 host bits.

Step 2 — Calculate the subnet mask:

Total address bits: 32. Host bits: 5. Network + subnet bits: 32 − 5 = 27.

Subnet mask = /27 = 255.255.255.224

(The last octet: 256 − 2⁵ = 256 − 32 = 224)

Step 3 — Count the usable subnets:

Original network: /24. New mask: /27. Borrowed bits: 27 − 24 = 3.

Number of subnets = 2³ = 8 subnets

Step 4 — Verify:

Each subnet has 2⁵ = 32 addresses, of which 30 are usable. Total addresses: 8 × 32 = 256 = 2⁸, which correctly accounts for the entire /24 block.

Key concept: When the problem says “at least 30 hosts,” you must find the smallest power of 2 that satisfies 2ⁿ − 2 ≥ 30. Using n = 5 gives exactly 30, which meets the requirement. Choosing n = 4 (yielding only 14 hosts) would be insufficient. On the PE Computer Engineering exam, subnetting is a core networking skill—practice converting between CIDR notation, dotted-decimal masks, and host/subnet counts until it becomes automatic.

Answer: C

A direct-mapped cache with spatial locality benefits from loading entire blocks on each miss, so subsequent accesses to the same block are hits.

Step 1 — Determine elements per cache block:

Block size = 64 bytes. Element size = 4 bytes.

Elements per block = 64 / 4 = 16 elements

Step 2 — Count the total number of blocks accessed:

Total elements = 4,096. Elements per block = 16.

Blocks accessed = 4,096 / 16 = 256 blocks

Step 3 — Determine hits and misses per block:

For each block, the first access is a compulsory miss (cold start). The remaining 15 accesses are hits (the block is now in cache).

Since we have 256 cache lines and access exactly 256 distinct blocks sequentially, there are no conflict misses (each block maps to a unique cache line in sequential access of a contiguous array).

Step 4 — Compute the hit rate:

Total accesses = 4,096

Total misses = 256 (one per block)

Total hits = 4,096 − 256 = 3,840

Hit rate = 3,840 / 4,096 = 15/16 = 93.75%

Verification: The miss rate = 1/16 = 6.25%. This makes intuitive sense: out of every 16 consecutive accesses within one block, only the first one misses. 100% − 6.25% = 93.75%.

Key concept: The hit rate for sequential access depends primarily on the block size relative to element size. With a block size of B bytes and element size of E bytes, the cold-start hit rate for sequential access is (B/E − 1) / (B/E) = 1 − E/B. Here: 1 − 4/64 = 1 − 1/16 = 93.75%. On the PE Computer Engineering exam, also consider conflict misses (when multiple addresses map to the same cache line) and capacity misses (when the working set exceeds total cache size).

Answer: C

Nested loops with a dependent inner bound produce a triangular iteration pattern.

Step 1 — Count the total iterations:

The inner loop runs j = 1 to i for each value of i. The total number of iterations of the innermost operation is:

Total = ∑_i=1ⁿ i = 1 + 2 + 3 + … + n = n(n + 1) / 2

Step 2 — Verify with a small example (n = 4):

i=1: j runs 1 time. i=2: j runs 2 times. i=3: j runs 3 times. i=4: j runs 4 times.

Total = 1 + 2 + 3 + 4 = 10 = 4(5)/2 = 10. Confirmed.

Step 3 — Determine the asymptotic complexity:

n(n + 1) / 2 = (n² + n) / 2 = (1/2)n² + (1/2)n

The dominant term is n², so the time complexity is O(n²).

Key concept: When the inner loop bound depends on the outer loop variable, you must sum the series rather than simply multiplying the bounds. The sum 1 + 2 + … + n = n(n+1)/2 is one of the most important identities in algorithm analysis. Note that answer D gives n² for the exact count, which would be the case if the inner loop ran from 1 to n (independent bounds). The dependent bound produces a triangular number, which is roughly half of n². On the PE Computer Engineering exam, be prepared to distinguish between O(n²) and Θ(n²)—both apply here since the sum is exactly quadratic.

Answer: C

The RSA private exponent d is the modular multiplicative inverse of e modulo φ(n). That is, we need d such that e × d ≡ 1 (mod φ(n)).

Step 1 — Verify that e and φ(n) are coprime:

gcd(7, 120): 120 = 17 × 7 + 1, so gcd(7, 120) = 1. Valid choice of e.

Step 2 — Solve 7d ≡ 1 (mod 120):

We need 7d = 1 + 120k for some integer k.

Testing systematically: d = (1 + 120k) / 7

• k = 1: (1 + 120) / 7 = 121 / 7 = 17.29 (not integer)
• k = 2: (1 + 240) / 7 = 241 / 7 = 34.43 (not integer)
• k = 3: (1 + 360) / 7 = 361 / 7 = 51.57 (not integer)
• k = 4: (1 + 480) / 7 = 481 / 7 = 68.71 (not integer)
• k = 5: (1 + 600) / 7 = 601 / 7 = 85.86 (not integer)
• k = 6: (1 + 720) / 7 = 721 / 7 = 103 (integer!)

So d = 103.

Step 3 — Verify:

7 × 103 = 721. And 721 / 120 = 6 remainder 1. So 721 mod 120 = 1. Confirmed: 7 × 103 ≡ 1 (mod 120).

Verification of the other options:

• d = 23: 7 × 23 = 161. 161 mod 120 = 41 ≠ 1
• d = 71: 7 × 71 = 497. 497 mod 120 = 17 ≠ 1
• d = 113: 7 × 113 = 791. 791 mod 120 = 791 − 6(120) = 791 − 720 = 71 ≠ 1

Key concept: RSA security depends on the difficulty of factoring n into p and q. If an attacker can factor n, they can compute φ(n) and then easily find d using the extended Euclidean algorithm. For real RSA systems, p and q are each 1,024+ bits, making factoring computationally infeasible. On the PE Computer Engineering exam, you should be able to compute modular inverses for small numbers and understand why the relationship e × d ≡ 1 (mod φ(n)) guarantees that encryption followed by decryption recovers the original message: M^ed ≡ M (mod n) by Euler’s theorem.